Modem integrated circuits include ever-increasing numbers of functional elements, which drive an increase in the amount of time required to test the integrated circuits. These more complex integrated circuits also have a higher leakage power-consumption than their less complex counterparts. As the number of elements within the circuit expands, the individual size of the elements tends to decrease and the space between adjacent elements also decreases, and thus these new technologies are more sensitive to crosstalk.
To address these challenges, new test methodologies like scan test compression are used. The use of such methodologies changes the structure of the integrated circuits designs by adding electrically conductive traces and components that are only used during the testing of the integrated circuit, and are not a part of the functional circuitry that is employed to accomplish the purpose of the integrated circuit. In other words, this testing circuitry is never used once the testing of the integrated circuit is completed and the integrated circuit is placed into operational or functional use.
Thus, modern integrated circuit designs have many thousands of these short scan test chains. To control the complexity and the test tool run times, more and more designs use a hierarchical layout, commonly referred to as hard macros. This implementation of short scan chains in a hierarchical design results in the hard macros having hundreds and even thousands of test pins. These pins have no functionality during normal operation of the device, but they nevertheless can toggle during normal operation of the integrated circuit, which results in dynamic power consumption and crosstalk issues when the toggling scan port acts as an crosstalk aggressor for a functional net.
FIG. 1 depicts a prior art example of such a situation. The net SCANOUT123 is driving a scan net outside the HM1 circuit, and is only used for testing purposes, not for functional use of the integrated circuit. However, when the driving flip flop changes state, dynamic power is consumed by the test net. In addition, the SCANOUT 123 net is routed close to the nets DOUT1 and DOUT2, so the switching of SCANOUT123 can act as an aggressor net on the DOUT1 and the DOUT2 data signals.
What is needed, therefore, is a design that overcomes problems such as those described above, at least in part.